Experience: 5 to 10 yrs. | Salary: INR 25,00,000 - 35,00,000 P.A
Responsibilities
Design verification for highly complexity SoC designs, working as part of a larger R&D team, with minimal supervision.
Verification specification and verification plan generation, participation and contributing in reviews.
Setting up verification environments and modeling for verification purposes.
Creating and executing test plans to adequately verify and validate the functionality across a range of products.
Identifying, communicating and proposing solutions to verification blocking issues.
Debugging design related issues. Feedback to respective design engineers and jointly work out solutions.
Innovate to new verification methodologies and enhance existing platforms
Design verification for highly complexity SoC designs, working as part of a larger R&D team, with minimal supervision.
Verification specification and verification plan generation, participation and contributing in reviews.
Setting up verification environments and modeling for verification purposes.
Creating and executing test plans to adequately verify and validate the functionality across a range of products.
Identifying, communicating and proposing solutions to verification blocking issues.
Debugging design related issues. Feedback to respective design engineers and jointly work out solutions.
Innovate to new verification methodologies and enhance existing platforms
Experience / Knowledge in Keywords
Masters or Bachelor degree in Electrical Engineering, Communications or equivalent university programs
5+ years of experience in digital design in VHDL (preferred) and/or Verilog
In depth knowledge of HVL (Hardware Verification Language), Specman e - and experience in creating verification environments, eVCs and testcases using e.
Knowledge of UNIX/Linux scripting using shell programming and Perl/Python
In depth understanding of VLSI design flows will be advantage
Good know-how on SoC on-chip interconnect bus systems, high speed and standard SoC interfaces (USB, PCI(e), DDR, SPI, SDIO, etc), embedded application processors (MIPS, ARM) as well as standard SoC peripherals
Domain knowledge on communication standards, Ethernet, DSL, LTE
Good communication skills, open and collaborative working style within larger international teams
Working accurately and thoroughly within target timelines
Masters or Bachelor degree in Electrical Engineering, Communications or equivalent university programs
5+ years of experience in digital design in VHDL (preferred) and/or Verilog
In depth knowledge of HVL (Hardware Verification Language), Specman e - and experience in creating verification environments, eVCs and testcases using e.
Knowledge of UNIX/Linux scripting using shell programming and Perl/Python
In depth understanding of VLSI design flows will be advantage
Good know-how on SoC on-chip interconnect bus systems, high speed and standard SoC interfaces (USB, PCI(e), DDR, SPI, SDIO, etc), embedded application processors (MIPS, ARM) as well as standard SoC peripherals
Domain knowledge on communication standards, Ethernet, DSL, LTE
Good communication skills, open and collaborative working style within larger international teams
Working accurately and thoroughly within target timelines
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