Test and Verification Solutions (T&VS) is a UK based Semiconductor company. T&VS operates globally with local offices in the UK, USA, India, France, Germany, Singapore and Japan and is supported by network of international partners
- Responsibilities:
- Writing and debugging test-bench constraints
- To model complex arithmetic operations and debug
- Must be available for at least 1 year, preferably longer
- Minimum 4 years of experience in Verification)
- SV, UVM experience
- Experienced in modelling and closing coverage
- Must be adaptable and a quick learner
- A self-starter (works well in a team but good at owning tasks)
- Excellent communication skills
- Familiarity with version management tools
- Experience in some or all of the following tools:
- Knowledge of signal processing algorithms including FFT
- Scripting ability.
Knowledge/Skills required:
Mandatory:
o Incisive or Xcellium
o VManager
o Clearcase
Interested, please drop your updated CV to gomita.gr@testandverification.com
Recruiter Name:Gomita Ravanavar
Company:Test and Verification Solutions India Pvt Ltd
Telephone:0803345185
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