Senior Physical Design Engineer for Synopsys, South Korea

This person will be responsible for implementation of the IC physical design and low power flows for the top semiconductor companies of the world.
Ability to close designs at advanced nodes like 28nm or below is required.
The person will be accountable for floor planning, place & route, CTS, timing closure, noise / power analysis and low power digital flows for various application areas in the industry

You will be experienced in the following technical areas:
The most advanced technologies.
The most advanced ARM CPU/GPU hardening designs
The most advanced flows and techniques
Collaboration with top experts in the industry on the challenging/complex designs

- Strong design knowledge, tool knowledge in Digital IC backend is a must
- Synopsys ICC related products hands on experience preferred
- Should have worked on multimillion gate design
- Good working knowledge and experience of netlist to GDSII flows
- Hands on experience doing Physical Design of complex blocks and/or FullChip designs.
- Should have good understanding of timing, power and area trade-offs.
- Ability to pickup new flows, learn on the job and influence QOR is a must.
- Experience delivering designs with multiple voltage islands is a plus.
- ARM Core Hardening OR IP hardening will be a strong plus.
- Experience of 5-9 year
Recruiter Name:Human Resources
Email Address:akshatc@synopsys.com
Website:http://www.synopsys.com