Thursday, 28 June 2018

Design Engineer & Verification Engineer for Lund, Sweden

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XPT (eXtreme Performance Team) Consultancy and Software Services Private Limited is incorporated with the objective to deliver technology solutions and services to global customers. XPT Software is headquartered at Bangalore - the IT hub of the world. XPT software provides services and solution for developing Innovative systems and products in the areas of Wireless communication, Network solutions, Automotive and Aerospace Domains, Health care, Consumer electronics, Multimedia and Applications. XPT Software believes in building strategic long-term customer relationships
    Company Name :XPT software -partner company 
    Job Location: Lund, Sweden. 
    Assignment duration: Long term (Permanent)

    Requirements- Must list (short, and real must, no order)
    Minimum 7+ years experience of ASIC and/or FPGA design with SPECMAN or System Verilog
    Experiencewith FPGA design toolssuch as Verilog/SV, VHDL and programming on Xilinx and AlteraFPGAs
    Experience of large complex digital ASIC designs with advanced filters and high speed links
    Knowledge inscientificprogramming in MATLAB, Simulink and/or C/C++
    RTL design using VHDL and/or SV
    Physical design and Verification
    Candidate should be able to manage a team and focus on the delivery of the tasks.
    Exellent written and verbal communication skills in English
    Should have worked with project management tools like hansoft/MS project manager
    Good to have
    Radio Access Technology
    Formal Verification
    HighLevelSynthesis
    Lab measurements on FPGA platforms
    Experience in mixed signaldevelopment
    ASIC STA analysis
    TopLevelverification
    Requirement : 2
    Job description: ASIC/FPGA Verification Engineer
    Minimum 7 + years experience of ASIC and/or FPGA verification with SPECMAN or System Verilog
    Experience from verification of large complex digital ASIC designs with advanced filters and high speed links
    Scripting using e.g. Python, TCL, and/or Perl
    Clock crossing domain circuits
    Verification & Design
    Block verification using SV+UVM and/or Specman E
    Physical design and Verification
    Candidate should be able to manage a team and focus on the delivery of the tasks.
    Candidates must be good team players with attention to detail, self-disciplined, able to manage their own time and workload, proactive and motivated
    Candidates shall also have good written and verbal communication skills in English
    Good to have
    Radio Access Technology
    Formal Verification
    High Level Synthesis
    Lab measurements on FPGA platforms
    Experience in mixed signal development
    ASIC STA analysis
    Top Level verification

Mr. Vikas Agarwal
vikas.agarwal@xptsoftware.com
careers@xptsoftware.com
divya.velakaturi@xptsoftware.com

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