We are currently in the look for Physical Verification Engineers who can work in a challenging environment 

Location : - Penang , Malaysia

Job Description : -

Physical Verification:-

B.E/M.Tech with 5 to 8 yrs of Industry experience in Physical verification at block-level, and 
chip-level
DRC, LVS DFM, Antenna, Density Fill Routines and other Tapeout sign-off experience
Experience using Synopsys ICC Tool and tapeout experience of multiple complex chips (10M+ 
gates) at 14 nm or below
Programming experience in tcl, Perl or C
Proficient in planning for and addressing electrical considerations throughout the design process (EM, IR, Noise, etc.)
Physical verification flow automation exposure will be an added advantage
Candidate with Physical Design and Physical Verification is preferred

Candidates meeting these requirements only need to send their resume to Kurian.Mathew@ust-global.com

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